1. Technical Field
The present invention relates to testing integrated circuits in general, and in particular to a method for performing reliability tests on integrated circuits. Still more particularly, the present invention relates to a method for performing a high-temperature burn-in test on integrated circuits.
2. Description of the Prior Art
A metal oxide semiconductor field effect transistor (MOSFET) or MOS transistor has two regions in a silicon substrate, namely, a source and a drain, which are disposed at a certain distance from each other. The MOS transistor also has an insulated gate disposed between the source and the drain. The gate is characterized by a threshold voltage (V.sub.TH) that determines the boundary between an ON state and an OFF state in the drain current.
It is well-known in the art that the threshold voltage of a MOS transistor changes as a function of temperature due to the availability of mobile electrons and other factors. Specifically, the threshold voltage decreases as temperature increases. This creates a problem for most integrated circuit (IC) designs because some qualification tests, such as a burn-in test, are required to be performed at high temperatures. Because the threshold voltages of the transistors are generally lower at high temperatures, the leakage currents and on-state drain currents of the transistors become significantly higher under burn-in conditions. In the prior art, this problem is solved by biasing the body of the transistors with additional contacts to the body of the transistors. This solution results in a much larger circuit and a reduction in the overall performance of the IC. Consequently, it is desirable to provide a method to maintain the threshold voltage of transistors within an integrated circuit during a high-temperature burn-in test without compromising the integrity of the test.